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diff --git a/Core/Src/system_stm32l0xx.c b/Core/Src/system_stm32l0xx.c
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-/**

-  ******************************************************************************

-  * @file    system_stm32l0xx.c

-  * @author  MCD Application Team

-  * @brief   CMSIS Cortex-M0+ Device Peripheral Access Layer System Source File.

-  *

-  *   This file provides two functions and one global variable to be called from

-  *   user application:

-  *      - SystemInit(): This function is called at startup just after reset and

-  *                      before branch to main program. This call is made inside

-  *                      the "startup_stm32l0xx.s" file.

-  *

-  *      - SystemCoreClock variable: Contains the core clock (HCLK), it can be used

-  *                                  by the user application to setup the SysTick

-  *                                  timer or configure other parameters.

-  *

-  *      - SystemCoreClockUpdate(): Updates the variable SystemCoreClock and must

-  *                                 be called whenever the core clock is changed

-  *                                 during program execution.

-  *

-  *

-  ******************************************************************************

-  * @attention

-  *

-  * <h2><center>&copy; Copyright(c) 2016 STMicroelectronics.

-  * All rights reserved.</center></h2>

-  *

-  * This software component is licensed by ST under BSD 3-Clause license,

-  * the "License"; You may not use this file except in compliance with the

-  * License. You may obtain a copy of the License at:

-  *                        opensource.org/licenses/BSD-3-Clause

-  *

-  ******************************************************************************

-  */

-

-/** @addtogroup CMSIS

-  * @{

-  */

-

-/** @addtogroup stm32l0xx_system

-  * @{

-  */

-

-/** @addtogroup STM32L0xx_System_Private_Includes

-  * @{

-  */

-

-#include "stm32l0xx.h"

-

-#if !defined  (HSE_VALUE)

-  #define HSE_VALUE    ((uint32_t)8000000U) /*!< Value of the External oscillator in Hz */

-#endif /* HSE_VALUE */

-

-#if !defined  (MSI_VALUE)

-  #define MSI_VALUE    ((uint32_t)2097152U) /*!< Value of the Internal oscillator in Hz*/

-#endif /* MSI_VALUE */

-

-#if !defined  (HSI_VALUE)

-  #define HSI_VALUE    ((uint32_t)16000000U) /*!< Value of the Internal oscillator in Hz*/

-#endif /* HSI_VALUE */

-

-

-/**

-  * @}

-  */

-

-/** @addtogroup STM32L0xx_System_Private_TypesDefinitions

-  * @{

-  */

-

-/**

-  * @}

-  */

-

-/** @addtogroup STM32L0xx_System_Private_Defines

-  * @{

-  */

-/************************* Miscellaneous Configuration ************************/

-

-/* Note: Following vector table addresses must be defined in line with linker

-         configuration. */

-/*!< Uncomment the following line if you need to relocate the vector table

-     anywhere in Flash or Sram, else the vector table is kept at the automatic

-     remap of boot address selected */

-/* #define USER_VECT_TAB_ADDRESS */

-

-#if defined(USER_VECT_TAB_ADDRESS)

-/*!< Uncomment the following line if you need to relocate your vector Table

-     in Sram else user remap will be done in Flash. */

-/* #define VECT_TAB_SRAM */

-#if defined(VECT_TAB_SRAM)

-#define VECT_TAB_BASE_ADDRESS   SRAM_BASE       /*!< Vector Table base address field.

-                                                     This value must be a multiple of 0x200. */

-#define VECT_TAB_OFFSET         0x00000000U     /*!< Vector Table base offset field.

-                                                     This value must be a multiple of 0x200. */

-#else

-#define VECT_TAB_BASE_ADDRESS   FLASH_BASE      /*!< Vector Table base address field.

-                                                     This value must be a multiple of 0x200. */

-#define VECT_TAB_OFFSET         0x00000000U     /*!< Vector Table base offset field.

-                                                     This value must be a multiple of 0x200. */

-#endif /* VECT_TAB_SRAM */

-#endif /* USER_VECT_TAB_ADDRESS */

-

-/******************************************************************************/

-/**

-  * @}

-  */

-

-/** @addtogroup STM32L0xx_System_Private_Macros

-  * @{

-  */

-

-/**

-  * @}

-  */

-

-/** @addtogroup STM32L0xx_System_Private_Variables

-  * @{

-  */

-  /* This variable is updated in three ways:

-      1) by calling CMSIS function SystemCoreClockUpdate()

-      2) by calling HAL API function HAL_RCC_GetHCLKFreq()

-      3) each time HAL_RCC_ClockConfig() is called to configure the system clock frequency

-         Note: If you use this function to configure the system clock; then there

-               is no need to call the 2 first functions listed above, since SystemCoreClock

-               variable is updated automatically.

-  */

-  uint32_t SystemCoreClock = 2097152U; /* 32.768 kHz * 2^6 */

-  const uint8_t AHBPrescTable[16] = {0U, 0U, 0U, 0U, 0U, 0U, 0U, 0U, 1U, 2U, 3U, 4U, 6U, 7U, 8U, 9U};

-  const uint8_t APBPrescTable[8] = {0U, 0U, 0U, 0U, 1U, 2U, 3U, 4U};

-  const uint8_t PLLMulTable[9] = {3U, 4U, 6U, 8U, 12U, 16U, 24U, 32U, 48U};

-

-/**

-  * @}

-  */

-

-/** @addtogroup STM32L0xx_System_Private_FunctionPrototypes

-  * @{

-  */

-

-/**

-  * @}

-  */

-

-/** @addtogroup STM32L0xx_System_Private_Functions

-  * @{

-  */

-

-/**

-  * @brief  Setup the microcontroller system.

-  * @param  None

-  * @retval None

-  */

-void SystemInit (void)

-{

-  /* Configure the Vector Table location add offset address ------------------*/

-#if defined (USER_VECT_TAB_ADDRESS)

-  SCB->VTOR = VECT_TAB_BASE_ADDRESS | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM */

-#endif /* USER_VECT_TAB_ADDRESS */

-}

-

-/**

-  * @brief  Update SystemCoreClock variable according to Clock Register Values.

-  *         The SystemCoreClock variable contains the core clock (HCLK), it can

-  *         be used by the user application to setup the SysTick timer or configure

-  *         other parameters.

-  *

-  * @note   Each time the core clock (HCLK) changes, this function must be called

-  *         to update SystemCoreClock variable value. Otherwise, any configuration

-  *         based on this variable will be incorrect.

-  *

-  * @note   - The system frequency computed by this function is not the real

-  *           frequency in the chip. It is calculated based on the predefined

-  *           constant and the selected clock source:

-  *

-  *           - If SYSCLK source is MSI, SystemCoreClock will contain the MSI

-  *             value as defined by the MSI range.

-  *

-  *           - If SYSCLK source is HSI, SystemCoreClock will contain the HSI_VALUE(*)

-  *

-  *           - If SYSCLK source is HSE, SystemCoreClock will contain the HSE_VALUE(**)

-  *

-  *           - If SYSCLK source is PLL, SystemCoreClock will contain the HSE_VALUE(**)

-  *             or HSI_VALUE(*) multiplied/divided by the PLL factors.

-  *

-  *         (*) HSI_VALUE is a constant defined in stm32l0xx_hal.h file (default value

-  *             16 MHz) but the real value may vary depending on the variations

-  *             in voltage and temperature.

-  *

-  *         (**) HSE_VALUE is a constant defined in stm32l0xx_hal.h file (default value

-  *              8 MHz), user has to ensure that HSE_VALUE is same as the real

-  *              frequency of the crystal used. Otherwise, this function may

-  *              have wrong result.

-  *

-  *         - The result of this function could be not correct when using fractional

-  *           value for HSE crystal.

-  * @param  None

-  * @retval None

-  */

-void SystemCoreClockUpdate (void)

-{

-  uint32_t tmp = 0U, pllmul = 0U, plldiv = 0U, pllsource = 0U, msirange = 0U;

-

-  /* Get SYSCLK source -------------------------------------------------------*/

-  tmp = RCC->CFGR & RCC_CFGR_SWS;

-

-  switch (tmp)

-  {

-    case 0x00U:  /* MSI used as system clock */

-      msirange = (RCC->ICSCR & RCC_ICSCR_MSIRANGE) >> RCC_ICSCR_MSIRANGE_Pos;

-      SystemCoreClock = (32768U * (1U << (msirange + 1U)));

-      break;

-    case 0x04U:  /* HSI used as system clock */

-      if ((RCC->CR & RCC_CR_HSIDIVF) != 0U)

-      {

-        SystemCoreClock = HSI_VALUE / 4U;

-      }

-      else

-      {

-        SystemCoreClock = HSI_VALUE;

-      }

-      break;

-    case 0x08U:  /* HSE used as system clock */

-      SystemCoreClock = HSE_VALUE;

-      break;

-    default:  /* PLL used as system clock */

-      /* Get PLL clock source and multiplication factor ----------------------*/

-      pllmul = RCC->CFGR & RCC_CFGR_PLLMUL;

-      plldiv = RCC->CFGR & RCC_CFGR_PLLDIV;

-      pllmul = PLLMulTable[(pllmul >> RCC_CFGR_PLLMUL_Pos)];

-      plldiv = (plldiv >> RCC_CFGR_PLLDIV_Pos) + 1U;

-

-      pllsource = RCC->CFGR & RCC_CFGR_PLLSRC;

-

-      if (pllsource == 0x00U)

-      {

-        /* HSI oscillator clock selected as PLL clock entry */

-        if ((RCC->CR & RCC_CR_HSIDIVF) != 0U)

-        {

-          SystemCoreClock = (((HSI_VALUE / 4U) * pllmul) / plldiv);

-        }

-        else

-        {

-          SystemCoreClock = (((HSI_VALUE) * pllmul) / plldiv);

-        }

-      }

-      else

-      {

-        /* HSE selected as PLL clock entry */

-        SystemCoreClock = (((HSE_VALUE) * pllmul) / plldiv);

-      }

-      break;

-  }

-  /* Compute HCLK clock frequency --------------------------------------------*/

-  /* Get HCLK prescaler */

-  tmp = AHBPrescTable[((RCC->CFGR & RCC_CFGR_HPRE) >> RCC_CFGR_HPRE_Pos)];

-  /* HCLK clock frequency */

-  SystemCoreClock >>= tmp;

-}

-

-

-

-/**

-  * @}

-  */

-

-/**

-  * @}

-  */

-

-/**

-  * @}

-  */

-

-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/