From bc481107298791bf0efd984ecc53dc92b8719878 Mon Sep 17 00:00:00 2001 From: Clyhtsuriva Date: Tue, 26 Jan 2021 18:26:26 +0100 Subject: Insertion du projet dans sa totalité MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit --- simonnnnn/simonnnnn Run.cfg | 36 ++++++++++++++++++++++++++++++++++++ 1 file changed, 36 insertions(+) create mode 100644 simonnnnn/simonnnnn Run.cfg (limited to 'simonnnnn/simonnnnn Run.cfg') diff --git a/simonnnnn/simonnnnn Run.cfg b/simonnnnn/simonnnnn Run.cfg new file mode 100644 index 0000000..d5fb51d --- /dev/null +++ b/simonnnnn/simonnnnn Run.cfg @@ -0,0 +1,36 @@ +# This is an NUCLEO-L053R8 board with a single STM32L053R8Tx chip +# +# Generated by System Workbench for STM32 +# Take care that such file, as generated, may be overridden without any early notice. Please have a look to debug launch configuration setup(s) + +source [find interface/stlink.cfg] + +set WORKAREASIZE 0x2000 + +transport select "hla_swd" + +set CHIPNAME STM32L053R8Tx +set BOARDNAME NUCLEO-L053R8 + +# CHIPNAMES state +set CHIPNAME_CPU0_ACTIVATED 1 + +# Enable debug when in low power modes +set ENABLE_LOW_POWER 1 + +# Stop Watchdog counters when halt +set STOP_WATCHDOG 1 + +# STlink Debug clock frequency +set CLOCK_FREQ 8000 + +# use hardware reset, connect under reset +# connect_assert_srst needed if low power mode application running (WFI...) +reset_config srst_only srst_nogate connect_assert_srst +set CONNECT_UNDER_RESET 1 + +# BCTM CPU variables + + + +source [find target/stm32l0x.cfg] -- cgit v1.2.3